; ------------------------------------------------------------------------ ; ; Title: ; ; PD13 -- PIC 10 MHz to three frequencies divider (1-10-100 Hz), with sync ; ; Function: ; ; This PIC program implements a digital frequency divider: cpu hardware ; and isochronous software divide the input clock by 7 powers of ten. ; This allows generation of decade outputs from 10 kHz to 1 Hz (1PPS). ; ; - In this version a 10 MHz input clock is divided to create three ; simultaneous square wave outputs: 1 Hz, 10 Hz, 100 Hz. ; ; - Two inputs support optional manual 1PPS synchronization. Pull Arm ; pin low for a second to stop divider. All outputs will synchronize ; to next rising edge of Sync pin (within one instruction cycle). ; ; Diagram: ; ---__--- ; 5V (Vdd) +++++|1 8|===== Ground (Vss) ; 10 MHz clock in ---->|2 pD 7|----> 100 Hz out ; 1 Hz out <----|3 13 6|----> 10 Hz out ; Arm o--->|4 5|<+--- Sync ; -------- ; Notes: ; ; o External pull-up required on Arm input (pin4/GP3). ; + Sync input (pin5/GP2) has internal WPU. ; Output frequency accuracy is the same as clock input accuracy. ; Output drive current is 25 mA maximum per pin. ; Coded for Microchip 12F675 but any '609 '615 '629 '635 '675 '683 works. ; ; Version: ; ; 28-Jan-2013 Tom Van Baak (tvb) www.LeapSecond.com/pic ; ; ------------------------------------------------------------------------ ; Microchip MPLAB IDE assembler code (mpasm). list p=pic12f675 include p12f675.inc __config _EC_OSC & _MCLRE_OFF & _WDT_OFF ; Register definitions. cblock 0x20 ; define register base gpcopy ; shadow of output pins dig4, dig3, dig2, dig1, dig0 endc ; Define entry points. org 0 ; power-on entry goto init ; org 4 ; interrupt entry goto sync ; ; One-time PIC 12F675 initialization. init: bcf STATUS,RP0 ; bank 0 movlw 0x07 ; turn comparator off movwf CMCON ; clrf GPIO ; set output latches low bsf STATUS,RP0 ; bank 1 errorlevel -302 clrf ANSEL ; all digital (no analog) pins movlw ~(1< W movwf GPIO ; W -> GPIO call Delay5 ; (sync alignment) sync: call armed ; check for Arm request ; Update counter and map each output pin to decade LSB. call count ; increment counter clrf gpcopy ; btfss dig1,0 ; 100 Hz decade LSB bsf gpcopy,GP0 ; btfss dig2,0 ; 10 Hz decade LSB bsf gpcopy,GP1 ; btfss dig3,0 ; 1 Hz decade LSB bsf gpcopy,GP4 ; ; Pad loop for exactly 1250 instructions (use MPLAB SIM). movlw d'10' ; call DelayW100 ; delay W*100 movlw d'191' ; call DelayW1 ; delay (15 <= W <= 255) goto loop ; ; Initialize counter (zero) and output pins (high). clear: clrf dig0 clrf dig1 clrf dig2 clrf dig3 clrf dig4 movlw 1< W andlw (1<