; ------------------------------------------------------------------------
;
; Title:
;
;   PD44 -- PIC 19.2 MHz to four frequencies divider (1-10-100-1000 Hz)
;
; Function:
;
;   This PIC program implements a digital frequency divider: the external
;   19.2 MHz clock is divided to produce four simultaneous, synchronized
;   output frequencies of 1 Hz, 10 Hz, 100 Hz, and 1 kHz.
;
; Diagram:
;                                ---__---
;                5V (Vdd)  +++++|1      8|=====  Ground (Vss)
;             19.2 MHz in  ---->|2  pD  7|---->  1000 Hz out
;                1 Hz out  <----|3  44  6|---->  100 Hz out
;                              o|4      5|---->  10 Hz out
;                                --------
; Notes:
;
;   o Tie unused input pin4/GP3 to Vdd or Vss.
;   Output frequency accuracy is the same as clock input accuracy.
;   Output drive current is 25 mA maximum per pin.
;   Coded for Microchip 12F675 but any '609 '615 '629 '635 '675 '683 works.
;
; Version:
;
;   27-Mar-2016  Tom Van Baak (tvb)  www.LeapSecond.com/pic
;
; ------------------------------------------------------------------------


; Microchip MPLAB IDE assembler code (mpasm).

        list        p=pic12f675
        include     p12f675.inc
        __config    _EC_OSC & _MCLRE_OFF & _WDT_OFF

; Register definitions.

        cblock  0x20            ; define register base
            gpcopy              ; shadow of output pins
            dig3, dig2, dig1, dig0
        endc

; One-time PIC 12F675 initialization.

        org     0
        movlw   0x07            ; turn comparator off
        movwf   CMCON           ;
        clrf    GPIO            ; set output latches low

        bsf     STATUS,RP0      ; bank 1
        errorlevel -302
        clrf    ANSEL           ; all digital (no analog) pins
        movlw   ~(1<<GP4 | 1<<GP2 | 1<<GP1 | 1<<GP0)
        movwf   TRISIO          ; set pin directions (0=output)
        errorlevel +302
        bcf     STATUS,RP0      ; bank 0

        clrf    dig0            ;
        clrf    dig1            ;
        clrf    dig2            ;
        clrf    dig3            ;

        movlw   1<<GP4 | 1<<GP2 | 1<<GP1 | 1<<GP0
        movwf   gpcopy          ; initialize shadow output

; To create multiple frequency outputs the PIC increments a virtual
; '7490-style decade counter chain in a continuous isochronous loop.
; Clocking the counter at twice the output rate allows each LSB to
; generate a square wave at the desired decade frequency.
;
; A 500 us (2 kHz) toggle loop can generate a 1 kHz square wave.
; With a 19.2 MHz clock (~208.3 ns Tcy) 2400 instructions is 500 us.

loop:   movf    gpcopy,W        ; gpcopy -> W
        movwf   GPIO            ; W -> GPIO

        ; Update counter and map each output pin to decade LSB.

        call    count           ; increment counter
        clrf    gpcopy          ;
        btfss   dig0,0          ; 1000 Hz decade LSB
          bsf   gpcopy,GP0      ;
        btfss   dig1,0          ; 100 Hz decade LSB
          bsf   gpcopy,GP1      ;
        btfss   dig2,0          ; 10 Hz decade LSB
          bsf   gpcopy,GP2      ;
        btfss   dig3,0          ; 1 Hz decade LSB
          bsf   gpcopy,GP4      ;

        ; Pad loop for exactly 2400 instructions (use MPLAB SIM).

        movlw   d'23'           ;
        call    DelayW100       ; delay W*100
        movlw   d'58'           ;
        call    DelayW1         ; delay (15 <= W <= 255)
        goto    loop            ;

; Increment 4-digit decimal counter (isochronous code).

count:  incf    dig0,F          ; always increment LSDigit
        movlw   d'10'           ;
        subwf   dig0,W          ; check overflow
        skpnz                   ;
          clrf  dig0            ; reset to zero

        skpnz                   ;
          incf  dig1,F          ; apply previous carry
        movlw   d'10'           ;
        subwf   dig1,W          ; check overflow
        skpnz                   ;
          clrf  dig1            ; reset to zero

        skpnz                   ;
          incf  dig2,F          ; apply previous carry
        movlw   d'10'           ;
        subwf   dig2,W          ; check overflow
        skpnz                   ;
          clrf  dig2            ; reset to zero

        skpnz                   ;
          incf  dig3,F          ; apply previous carry
        movlw   d'10'           ;
        subwf   dig3,W          ; check overflow
        skpnz                   ;
          clrf  dig3            ; reset to zero

        return

        include delayw.asm      ; precise delay functions
        end